ScanWorks® JTAG Test Development Station Bundle

Custom Test Generation

Although most boundary-scan interconnect tests can be developed with ScanWorks’ automatic test pattern generation (ATPG) tools, many times additional coverage can be achieved by manually generating tests. This is especially useful when a boundary-scan test can observe patterns applied to non-boundary-scan logic or analog circuits. Boundary scan or JTAG often is used during prototype debug or board repair to set static conditions on a board in order to initialize it for other types of tests such as instrument probing. The Test Development Station provides several convenient ways to generate custom tests or to apply certain boundary-scan patterns to a PCB. The test generation methods include Process Automation Scripting, a macro programming language and a boundary scan stimulus language.

Process Automation Scripting is a very powerful tool with many applications. It supports custom test generation by providing access to all of the boundary scan (JTAG) features on any device that is accessible to ScanWorks. Test patterns can be applied and the results observed at any level of the design, from specific scan cells to nets at the board or system level. Any test programming language can be used to create these tests, including languages that supports Microsoft’s Component Object Model (COM), Tcl, Perl, Visual Basic, C, C# and C++. For details on Process Automation Scripting, see the Process Automation Scripting Fact Sheet on the ASSET web site.

The ScanWorks Test Development Station’s macro programming language is a powerful, high-level language that provides access to a design at any level; including individual scan cells, entire test registers or subsets of test registers. With specialized functions and procedures you can control or observe a specific pin or create a complete test for a cluster of non-boundary-scan logic. With a macro program you can establish “safe” conditions before entering the boundary-scan test mode or maintain a safe state throughout testing.

Another option for custom testing is the Boundary Scan Stimuli Language (BSL). A BSL action can easily test a cluster of non-boundary-scan logic. BSL automatically creates a template file, which specifies the boundary-scan pins that control and observe the non-boundary-scan logic. This file also will contain the vectors to test the logic cluster.

Tests generated in Serial Vector Format (SVF) can also be imported from other test generation tools. SVF is the de facto standard for transporting boundary-scan tests among boundary-scan systems. While SVF is convenient, it is limited in the diagnostic information it provides. In addition, imported SVF files are applied “as is” without the usual safeguards that are built into ScanWorks actions.

PLD(Programming Logic Device) Programming

Strictly speaking, PLD programming is not a test operation, but it can be combined with boundary-scan testing to save time and avoid re-connecting the PCB to a programming station. Most PLDs, including CPLDs and FPGAs, can be programmed through the JTAG pins on the device. Tools from PLD vendors such as Xilinx, Lattice, Altera and Cypress create programming files in either SVF or in Serial Test And Programming Language (STAPL) (sometimes referred to as JAM files). ScanWorks imports these files and manages the scan path on which the programmable device is located. The target device can be located on any accessible scan chain.

ScanWorks’ optional IEEE 1532 Concurrent In-System Configuration feature loads configuration data into multiple PLDs from different vendors concurrently, significantly reducing overall PLD configuration time. Devices are not loaded sequentially. So, in most cases the total programming time for multiple devices is approximately the time to program the slowest device. For more information about this feature see the description in this document.

The ScanWorks Test Development Station can also load data into devices using the I2C protocol. If the I2C pins are accessible from the boundary-scan pins of an adjacent device, ScanWorks can automatically detect the I2C pins and execute the I2C protocols to load data files into the device. This feature is often used to load board-specific data such as serial numbers and version numbers at test time.

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