ScanWorks® PCI-100 JTAG Controller

Product Overview

The PCI-100 IEEE 1149.1 boundary-scan controller provides a sustained data throughput at high TCK frequencies allowing very fast test and in-system programming application times. The PCI-100 supports one Test Access Port (TAP) interface to the board and two TAP control modes. By supporting two different TAP control modes, the PCI-100 enables support of non-compliant, boundary-scan devices and special board test operations. It uses the industry-proven Texas Instruments SN74LVT8980 embedded Test Bus Controller (eTBC) for dependable scan operations. The PCI-100 supports a controller-to-board distance of 4 feet without the use of the optional pod. The pod extends that distance to 9 feet. Custom-built cables can extend the maximum distance to over 20 feet using lower TCK frequencies. The optional pod also expands the supported voltages from 3.3V (5V tolerant) to a range of 1.8V to 5.0V. The PCI-100 also supports 16 individually controllable discrete I/O signals for controlling and monitoring non-boundary-scan signals.

PCI-100 Product

The base PCI-100 product includes:

• One controller card
• One PCI card-to-board TAP cable (4 feet)
• One PCI card-to-board TAP cable (8 inches)

An optional discrete I/O cable (connects PCI-100 card-to-board being tested) is available (no connector at board end). The optional pod adds:

• One pod
• One PCI card-to-pod cable (5 feet)

The card-to-board cable provided with the controller card is compatible with the pod-to-board connector, eliminating the need for another cable.

PCI-100 Programmable Clock

The TCK signal provided by the PCI-100 controller card is programmable in eight increments from 130 kHz to 16.6 MHz. This allows you to select the maximum TCK frequency your board will support, enabling the fastest test and programming times. The TCK frequency is controllable from the ASSET hardware setup menu or from the FREQUENCY statements in SVF and STAPL files.

PCI-100 Flexible TAP Support

The PCI-100 supports two modes of controlling the TAP signals:

• Gated TCK (default mode)
• Free running TCK

In the gated TCK mode, the TAP controller will not enter the PAUSE-IR or PAUSE-DR state during a data shift operation. If the data buffer needs to be reloaded, the TCK signal is inhibited until it is again ready for data transfers. This allows support of in-system configuration of FPGAs and some non-compliant devices, as well as support for multi-drop backplanes configured with the Texas Instruments Addressable Scan Port (ASP). The PCI-100 is capable of shifting data at continuous 16.6 Mbits per second without gating the TCK during scan operations.

The free running TCK mode applies a continuous TCK signal to the board, using the PAUSE-IR and PAUSE-DR states to reload shift buffers if necessary. This mode supports designs and devices that require a continuous TCK signal.

PCI-100 Discrete I/O Signals

The PCI-100 controller card supports 16 non-boundary-scan signals that can control inputs to the board or observe outputs from the board. The state of these signals can be controlled and observed using the ASSET macro language or from ScanWorks interactive applications such as the debugger. These signals are all bi-directional and controlled individually. These signals are open-collector outputs with LVTH level (3.3V, 5.0V tolerant) input monitoring. Eight signals are terminated for high drive and eight are terminated for low load characteristics. See the PCI-100 documentation for specifications.

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