JTAG  
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PRODUCTS

BSDL Services:
BSDL Validation Service
ScanWorks®
Boundary-Scan Products:

Interconnect Development Station
Interconnect Repair Station
Test Development Station
Diagnostic & Repair Station
Manufacturing Station
Programming Stations
IEEE 1149.6
Emergency License Tokens
Hardware Overview

IBIST Products:
ScanWorks® Intel® IBIST
Emulation Products:
MicroMaster
ICT Products:
ScanWorks® for Agilent's Medalist ICT
Technology:
Test Automation
System-Level JTAG


 

ScanWorks® JTAG Interconnect Repair Station Bundle

Organizing and Managing your Design and Test Data

You can keep all the design and test data associated with a design together with the design management software. Similar designs can be kept together in project folders. Projects and/or designs can be easily imported from any ScanWorks Development Station, Manufacturing Station, or from an Agilent ScanWorks for the 3070 system as a single compressed file. This eases the transferring of files to the diagnostic and repair function and ensures that all the required files are available.

All test or programming operations are implemented as actions. An action encapsulates all the information needed to run a test and diagnose the results. Actions can be executed individually or organized into sequences. A sequence can be executed in a batch mode. ScanWorks’ design management software includes the Sequencer, a simple test executive with which you can run several actions in succession. All actions and sequences can be exported as part of the design or project when it is moved to a ScanWorks diagnostic and repair station from development or manufacturing. The exported information includes test results files that indicate the faults that should be reviewed by repair personnel.

Diagnostics

Scan Path Verify Diagnostics

ScanWorks’ boundary-scan design description is based on the IEEE 1149.1 standard Boundary-Scan Description Language (BSDL) files that are provided by device vendors. ScanWorks’ design management software imports these descriptions and creates a description of the design with all of the information for performing scan operations. Once the design is described, tests to verify the design description against your actual board and tests to verify the scan path is actually working correctly are automatically created.

ScanWorks’ dialog for generating full scan path verification tests is provided in the Interconnect Repair Station so repair technicians have full access to its diagnostic features. By selecting or de-selecting the optional tests, technicians can quickly isolate scan path defects. Scan path verification tests also include options for specifying alternative device IDCODES or USERCODES in the event there are second source devices or there are different versions of the same device. The interactive debugger generates a state table view of the actual response data resulting from a test.

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