System Test with Boundary Scan (JTAG)

By David Bonnett
Technical Product Manager
ASSET InterTech, Inc.

Table of Contents
Executive Summary
What is system test and why would you want to do it?
Why system test?
How is system test implemented with boundary scan?
Boundary-scan access to each system component
System Test with Multi-drop Devices
Considering System Test

Executive Summary

Boundary scan (IEEE 1149.1/JTAG) is most often thought of as a board-level test method, but new hardware and software techniques make system-level test with boundary scan not only feasible, but quite effective. In fact, system-level tests with boundary scan can save a significant amount of time and effort troubleshooting systems that have failed functional test. Ultimately, boundary-scan system tests ensure a high-quality system.

Many different types of faults can arise when systems are assembled. JTAG testing techniques are well suited to finding and diagnosing many of these problems. In addition, the usefulness of boundary scan at the system level extends well beyond what is usually thought of as test functions. Besides structural integrity tests, JTAG can also perform on-board programming of flash memory, in-system configuration of programmable logic devices (PLDs), on-board programming with I2C data and emulation-based functional testing through a processor’s JTAG debug port. Some of these functions can be very helpful to support and maintenance personnel long after a system has been assembled in a manufacturing environment and installed at a customer location.

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