ASSET InterTech's Boundary-Scan Test, Processor-Controlled Test and I/O Instrumentation for Intel® IBIST are unique tools for access, auto­mation and analysis of embedded instrumentation.

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Leadership in Boundary-Scan Technology

ASSET's leadership position in the boundary-scan/JTAG industry began with its participation in the development of the IEEE 1149.1 standard in the mid-1990s. Since then, the company has consistently been at the forefront of research and development. Over the years, a number of ASSET developments were truly pioneering efforts. For example, ASSET’s boundary-scan test and in-system programming system, ScanWorks, can be traced back to the first commercially available JTAG system. Back then, it was simply called the ASSET system. Now, another of our breakthrough products, DFT Analyzer, is the industry’s only automatic JTAG design-for-test tool. In addition, ScanWorks was the first tool to offer IEEE 1149.6 testing of high-speed differential and AC-coupled buses, and it was the first JTAG system to support the embedded Intel® Interconnect Built In Self Test (IBIST) technology. We also pioneered the concept of free online libraries of resources like our cluster model and scripting libraries.

Distinct from our technology leadership, we believe in giving back to the industry. ASSET personnel have either led or participated in numerous standards development efforts. In fact, ASSET is responsible for maintaining the industry standard for Serial Vector Format (SVF). With Agilent Technologies, we co-developed and are currently hosting a free BSDL validation service. The other standards development efforts we’ve participated in are PICMG's MicroTCA specification, the IEEE P1687 Internal JTAG (IJTAG) effort, the ad hoc System JTAG working group, the IEEE 1532 standard for concurrent in-system program and JEDEC's STAPL standard.

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