ScanWorks® named Best in Test finalist twice!

By Glenn Woppman
President and CEO
ASSET InterTech

It would be easy for us to proudly pound our chest over two finalist designations for ScanWorks® in Test and Measurement World’s Best in Test awards program this year, but that would skew the emphasis from where it should be. For the test and measurement industry these great honors show that the tremendous upside leverage from embedded instrumentation is truly a game-changer.

A lot of hard work went into understanding the needs of the marketplace and subsequently developing and bringing to market two significant enhancements to the ScanWorks platform: ScanWorks for embedded boundary scan and ScanWorks support for validating and testing Intel® Xeon® Processor 5500 Series (codenamed Nehalem) designs. (Click here to read the news article about this year’s Best in Test awards.)

Both enhancements to the ScanWorks platform represent the next installment on our vision of an open tools platform for embedded instrumentation that delivers real validation, test, debug and diagnostic value for chips, circuit boards and entire systems. By pursuing this vision, we are taking the instrumentation that is already being embedded into chips and leveraging that value over the entire spectrum of a product’s life cycle. The graphic below shows how additional value is generated when embedded instrumentation is utilized early in the product life cycle. Our vision for ASSET is extending this value throughout the entire life cycle.

Click here to enlarge the above image.

The ScanWorks for embedded boundary scan functionality, for example, can extend the value of the instrumentation that was embedded early on when the chips were being developed and fabricated, and leverage that value later in the product life cycle. That’s what companies like the supercomputing supplier, Cray®, Inc., are doing. Cray is deploying the ScanWorks embedded diagnostics intellectual property (IP) into its next-generation supercomputers to increase the already high reliability of its systems and enhance their remote diagnostic capabilities.

For a deeper dive into some of the technical possibilities of ScanWorks for embedded diagnostics IP, click here.

Our other Best in Test finalist, ScanWorks support for validation and test of Intel® Xeon® Processor 5500 Series (codenamed Nehalem), attacks earlier points in the life cycle. Actually, these capabilities span both the design and manufacturing phases.

ScanWorks deploys three non-intrusive embedded instrumentation test technologies — boundary scan, built-in test and processor-controlled test (PCT) — to validate and test Xeon 5500-based circuit boards. During the design validation phase, for example, ScanWorks might employ Intel’s Interconnect Built-In Self Test (IBIST) embedded instrumentation technology to perform margining and bit error rate testing (BERT) on high-speed buses like Intel's QuickPath Interconnect and PCI Express. Later, during prototype debug and volume manufacturing, all three test technologies could be implemented. ScanWorks’ PCT capabilities are able to take control of the Xeon 5500 processor and assert structural and functional tests and diagnostics on other devices and buses on the circuit board, while boundary scan could perform its traditional structural shorts-and-opens testing on individual circuit boards as they are assembled or on multiple boards in a system.

The ScanWorks platform’s support for Intel-based designs is certainly not limited to Xeon designs. PCT supports a broad and growing array of Intel and non-Intel processors.

Mining the Value of Embedded Instrumentation

As I mentioned, embedded instrumentation was initially deployed to address chip-level validation and test issues, a role which it performs in a very specific and limited manner. Recent chip packaging innovations like multi-core devices, 3D multi-die chips and others can challenge the effective application of embedded instrumentation at the chip level. Employing an instrument or instruments embedded in one die in a 3D multi-die chip package requires a standardized access and control mechanism, and that’s where core instrumentation tools will come into play. The recent adoption of the IEEE 1149.7 compact JTAG standard and the pending ratification of the IEEE P1687 internal JTAG (IJTAG) standard are certainly encouraging signs. Standards-based enabling technology is being put in place to overcome the difficulties with testing and validating new chip packages. You’ll hear more about this in the not too distant future.

At the end of the day, it strikes me that embedded instrumentation is a lot like mining for gold. Extremely valuable IP is buried down there deep within chips. It’s up to us to deliver that value to you. We’ve made good progress so far, but there are other mother lodes on the way.