Non-intrusive board test, IJTAG top Users Group meeting at ITC

Several topics are being included on the agenda for the next ScanWorks Users Group meeting at ITC in Austin, TX, November 3-5. The details are still being finalized, but at the top of the agenda will be presentations and discussions of non-intrusive board test (NBT) and the new IEEE P1687 chip-level Internal JTAG (IJTAG) standard.

NBT refers to a software-driven test strategy which tests or validates the functionality of a circuit board by asserting routines and test patterns that are internal to the board rather than external. NBT as a test strategy involves non-intrusive test technologies like boundary scan, processor-controlled test (PCT) and Intel®'s embedded instrumentation technology, Interconnect Built-In Self Test (IBIST), all of which apply test routines and patterns in a non-intrusive manner through a small connector, usually the four-wire JTAG interface.

In contrast, the older intrusive test technologies such as in-circuit test (ICT), manufacturing defect analyzers (MDA), flying probe and others are hardware-intense and intrusive in the sense that they rely on multiple probes or a bed-of-nails fixture to insert tests at many points on the circuit board. Because they are hardware-intense, intrusive test systems are expensive to procure and maintain. The test coverage provided by intrusive test technologies is being lost because the many physical access points that the intrusive test technologies rely on is disappearing, squeezed out by advancements in technology on several fronts. For instance, placing a test pad on a high-speed serial interconnect is no longer feasible when the bus speed exceeds around five gigabits per second (Gbps) because a test pad introduces capacitance onto the bus which calls into question the validity of any test measurement.

According to Al Crouch, ASSET's chief technologist for core instruments, IJTAG is an important building block. There is no other standard governing the access to any embedded test, debug, or functional configuration logic in all environments, including ATE test interfaces, debug logic interfaces and yield-logic interfaces. Click here to read a Q-and-A article with Al on P1687.

Several new ScanWorks enhancements will also be described at the Users Group meeting, including the recently announced line of Remote Instrumentation Controllers (RIC) as well as Dispatcher, ScanWorks' parallel test capability. An 'ask-the-experts' session will be on the agenda too, where progress on related standards, such as the so-called 'compact boundary-scan' standard, IEEE 1149.7, and the emerging internal JTAG (IJTAG) standard (IEEE 1687) will be discussed.

ASSET's advancements with regards to embedded test IP (intellectual property) will also be detailed at the Users Group meeting.

As always, organizers of the meeting hope that users will share their ScanWorks successes with their peers at the gathering. If you have experienced a recent success with ScanWorks and would like to share it with the group, please send an email to Arden Bjerkeli, ASSET's Director of Customer Application Support, at abjerkeli@asset-intertech.com.

More information on the Users Group meeting will be available on the ASSET web site within the Support section.