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Glenn Woppman discusses ASSET's realignment as an embedded instrumentation company.
 

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OBSERVATIONS

Introducing the NEW ASSET InterTech
Embedded instrumentation ushers in a new generation
of design validation, test and debug

by Glenn Woppman
President and CEO of ASSET InterTech

ASSET has never shied away from leadership. Starting with the development of the original IEEE 1149.1 Boundary Scan Standard in the mid-1990s and continuing through the intervening years, we’ve been the front runner on a number of groundbreaking trends. Now, the time has come to pioneer the emergence of embedded instrumentation for design validation, test and debug. Certainly this is a momentous occasion for our company, but it is not without precedent. We’ve been out in front before. It’s where we want to be.

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TEST DATA OUT

Engineers keep an eye on signal integrity issues

The need for speed, that’s what the electronics industry has been about since its inception. Speed is part of the motivation behind the migration away from parallel interconnect and I/O buses, and toward high-speed serial buses. With change comes challenge. For a contemporary computer or communications system based on high-speed serial communications, one of the most nettlesome challenges is how to validate the integrity of the signals coursing through the system. ScanWorks is stepping to the fore with capabilities that are up to the task.

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INSIDE ASSET

ASSET commits to IJTAG tools development
Two experts join in effort to fast-track IJTAG adoption

Already asserting its leadership in the development of the Internal JTAG (IJTAG) standard (IEEE P1687), ASSET recently pushed the process a step further when the company made an overt commitment to IJTAG tools development by the hiring two industry-recognized experts in embedded instrumentation. Said Glenn Woppman, president and CEO of ASSET: “We think it is critical at this time to send a message to the industry that we will support IJTAG.”

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ScanWorks controller is first to support three types of embedded instrumentation

The ASSET ScanWorks PCI-200EJ controller card has been enhanced to support three distinct types of embedded instrumentation: boundary scan, CPU emulation and Intel® IBIST (Interconnect Built In Self Test). Adding IBIST support makes the PCI-200EJ particularly adept in manufacturing applications.

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Reducing stress on components improves system reliability
by Dave Bonnett
Technical Marketing Manager

Ironic as it may seem, the testing process, which should find faults and failures, can actually cause defects that eventually increase a system’s down time in the field. By placing unwarranted stress on components during manufacturing, test processes like in-circuit test (ICT) and boundary-scan test can reduce the long term reliability and durability of systems, increasing expensive down time and field repairs. The good news is that much of this stress is unnecessary and can be eliminated if proper practices are followed and the boundary-scan test system’s automatic test pattern generation (ATPG) tool is as smart and as comprehensive as ScanWorks.

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ASSET® Joins Mentor OpenDoor Program to ensure JTAG interoperability
ASSET joins forces with Mentor Graphics to ensure interoperability between ScanWorks® and Mentor’s embedded chip test and validation structures

Mentor Graphics, a leading electronic design automation (EDA) vendor, and ASSET have announced that they will work together to ensure that the ScanWorks platform for open embedded instrumentation will work smoothly and seamlessly with Mentor Graphics chip design tools.

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Osborn dispels confusion over processor emulation

Larry Osborn, ASSET’s product manager for emulation technology, sat down recently and answered a few questions about processor emulation technology and ASSET’s MicroMaster system. Contrary to some perceptions in the marketplace which limit processor emulation to flash programming applications, Larry points out that true processor emulation is quite versatile. It can be deployed to advantage in a wide range of design validation, prototype debug, manufacturing and functional test applications

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A contemporary allegory:
Chip learns a lesson from Mr. PCB

Once upon a time in the world of boundary-scan test, a conversation was overheard between one Peter C. Bennetts, more commonly known as Mr. PCB, and his young, brash acquaintance who goes by the simple name of Chip. By all accounts, the exchange was heated, but not to the point where circuits or traces were damaged. In the end, the two shook hands and Chip had to admit he had learned a valuable lesson.

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ScanWorks integrated into TRI's ICT platforms

ASSET and Test Research Inc. (TRI) of Taipei, Taiwan, have reached an agreement whereby the ScanWorks embedded instrumentation and boundary scan platform will be integrated into TRI’s in-circuit test (ICT) systems. The combination of JTAG test and ICT will increase test coverage and reduce test application times.

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