Standard aims embedded instruments at general test, By Al Crouch, Chief Technologist – Core Instruments, ASSET InterTech

A new emerging standard, IEEE P1687 Internal JTAG (IJTAG), will facilitate the shift from external, intrusive testers based on physically probing a chip or circuit board to internal, non-intrusive, software-driven methods…”

Read more...

“FPGA-Controlled-Test gewinnt an Bedeutung”, Al Crouch, Markt & Technik, July 2011 (pdf)

"IJTAG standard holds promise for 3D chip test", Al Crouch, EE Times, June 2011 (pdf)

“ScanWorks sieht, was der Chip sieht (ScanWorks sees what the silicon sees)”, Glenn Woppman, Markt & Technik, May 2011 (pdf)

“Bauelemente ubernehmen Testfunktionen”, Alan Sguigna, Elektronik, May 2011 (pdf)

"Parallel testen", Reg Waller, Elektronik Informationen, May 2011(pdf)

“Herkommliche Mess- und Testmethoden werden unbrauchbar”, Glenn Woppman, Elektronik, April 2011 (pdf)

“Neues Zeitalter fur elektronische Test- und Messmethoden (A New Era for Electronic Test and Measurement)”, Reg Waller, Elektronik Praxis, April 2011 (pdf)

"New IJTAG Standard for Embedded Test” Al Crouch, Radio-Electronics.com (UK), March 2011 (pdf)

"Viewpoint” Glenn Woppman, Circuitnet, March 2011

"Nurturing Your Culture Goes to the Bottom Line” Glenn Woppman, Evaluation Engineering, November 2010 (pdf)

"Embedded diagnostics are critical for today’s always-on systems” Reg Waller, New Electronics, November 2010 (pdf)

"Embedded-Instrumentierung – Neues Zeitalter für elektronische Test- und Messmethoden" Reg Waller. Elektronik Praxis, November 2010 (pdf)

“Berührungsloser Boardtest – was ist das?” Alan Sguigna, Elektronik Industrie, October 2010 (pdf)

"Embedded instruments unlock validation & test for Xeon 5500 processor boards" Alan Sguigna. EE Times Design, September 2010 (pdf)

"Embedded Instrumentation - die Testtechnologie der Zukunft?" Glenn Woppman, elektroniknet.de, July 2010 (pdf)

"Driving 3D Chip and Circuit Board Test into High Gear" by Al Crouch, CTO Core Instruments, Future-Fab International, April 2010 (pdf)

"3D-Chips auf dem Vormarsch: Herausforderungen bei Testverfahren" by Glenn Woppman, President & CEO, Embedded Design Germany, April 2010

"TAP und IJTAG: Synergie zweier zukunftsträchtiger Standards" by Glenn Woppman, EPP Europe, March 2010 (pdf)

"Embedded Instrumentation Has Intel® Xeon® Processor 5500 Series Designs Covered” by Tim Caffee, Embedded Intel Solutions Winter 2010 (pdf)

"Embedded Instrumentation Delivers Test/Validation Coverage on Intel Xeon 5500 Boards" Tim Caffee. ATCA Newsletter, February 2010 (pdf)

"Approaching Board Test Non-intrusively" by Alan Sguigna. Evaluation Engineering Magazine, December 2009. (pdf)

"Embedded Instruments - Messtechnik im Chip" by Al Crouch, chief technologist, core instrumentation, elektronik industrie (November 2009) (pdf)

"Non-Intrusive Board Test Gains Momentum"
by Reg Waller, EPN (November 2009) (pdf)

"Test Standards Emerge to Improve 3D-Chip Yield"
SOCcentral (October 2009) (pdf)

"Open Tools and Standards Emerge for Embedded Instrumentation" by Al Crouch, chief technologist, core instrumentation, Evaluation Engineering (February 2009)

"An Inside Job"
CIE - Components in Electronics (November 2008)

"Perfect Storm Brewing for Chip and Circuit Board Test"
SOCcentral (October 2008)

"Embedded Instrumentation and Boundary Scan"
Electronic Products (September 2008)

"Boundary Scan Skews Test Coverage Tradeoffs in your Favor"
BestTest Newsletter (May 2007)

"Glenn Woppman describes the new IJTAG and SJTAG initiatives at ITC"
Test & Measurement World - Audio Interview (October 2006)

"Expanded Role for JTAG DFT"
Evaluation Engineering (October 2006)

"Tackling tough problems"
Embedded System Engineering (Sept. 2005)

"Boundary scan goes underground"
Test & Measurement World (Sept. 2005)

"The Boundary Scan Infrastructure "
Circuits Assembly (June 2005)

"Making Moves from Board to System Test"
Electronics Manufacture and Test (June 2005) p. 11

"Boundary Scan's Horizons are Expanding"
Components in Electronics (June 2005) p.12

"Boundary Scan and Processor Emulation Achieve Synergy"
Evaluation Engineering (May 2005) p. 56

"Boundary Scan Benefits Lead-Free Assembly"
SMT Magazine (March 2005)